NDLI: TCAD Simulation of STI Stress Effect on Active Length for 130nm Technology

Content Provider	IEEE Xplore Digital Library
Author	Ahmad, W.R.W. Kordesch, A.V. Ahmad, I. Yew, P.T.B.
Copyright Year	2006
Description	Author affiliation: Silterra Malaysia Sdn Bhd, Kulim (Ahmad, W.R.W.; Kordesch, A.V.)
Abstract	In this paper we investigated the compressive stress in the channel induced by shallow trench isolation (STI) for different active length (Sa). We simulate both PMOS and NMOS for 130 nm gate length with five active lengths (Sa=0.34, 0.5, 0.8,1.0, 5.0 um) by using TCAD simulation and compare to experimental data from wafers fabricated using Silterra's 130 nm Technology. When the Sa is decreasing, Sxx stress becomes more compressive for both P- and N- MOS while the Syy component becomes more tensile, causing hole mobility improvement in PMOS and electron mobility degradation in NMOS. When Sa decreases from 5 um to 0.34 um, the Idsat for NMOS is degraded 6.6% and Idsat for PMOS is increased 6%. This means narrower Sa will increases hole mobility performance in p-channel but degrade the electron mobility in n-channel. These results agree with the experimental data.
Starting Page	1038
Ending Page	1041
File Size	1715057
Page Count	4
File Format	PDF
ISBN	0780397304
DOI	10.1109/SMELEC.2006.380798
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-29
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Medical simulation Compressive stress MOS devices Silicon Degradation CMOS technology MOSFET circuits Tensile stress Electron mobility Thermal stresses
Content Type	Text
Resource Type	Article

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