NDLI: Noise Analysis of the Pulse-Width Modulator for Quasi-Digital Sensors

Content Provider	IEEE Xplore Digital Library
Author	Horak, G. Bilas, V. Vasic, D.
Copyright Year	2008
Description	Author affiliation: Fac. of Electr. Eng. & Comput., Zagreb Univ., Zagreb (Horak, G.; Bilas, V.; Vasic, D.)
Abstract	Majority of available integrated and smart sensors are based on quasi-digitalization concept. A pulse modulation of the analog sensor output signal can be accomplished by using a fairly simple relaxation oscillator circuit. Pulse-width modulation (PWM) is commonly used in such applications, due to its ratiometric output that greatly reduces the error caused by the changes in the time constant of the oscillator. However, most of the literature that deal with the pulse-width modulators do not include the analysis of noise effects, which is important factor in optimizing the readout of PWM signal. In this article, we analyze the effects of noise in the simple dual-slope pulse-width modulator and provide an accurate noise model that can easily be adopted to any other type of pulse-width modulators. The model can be used to predict the jitter of the edges of output PWM signal and to analyze the effects of that jitter on the uncertainty of the measured duty-cycle for various PWM readout techniques.
Starting Page	687
Ending Page	691
File Size	257985
Page Count	5
File Format	PDF
ISBN	9781424415403
ISSN	10915281
DOI	10.1109/IMTC.2008.4547124
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-05-12
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Space vector pulse width modulation Pulse modulation Pulse width modulation Intelligent sensors Oscillators Signal analysis Jitter Circuit noise Predictive models Measurement uncertainty smart sensors pulse-width modulation relaxation oscillator noise analysis noise model analog-to-digital conversion quasi-digital sensors
Content Type	Text
Resource Type	Article
Subject	Instrumentation Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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