NDLI: Multi-layer global routing considering via and wire capacities

Content Provider	IEEE Xplore Digital Library
Author	Chin-Hsiung Hsu Huang-Yu Chen Yao-Wen Chang
Copyright Year	2008
Description	Author affiliation: Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei (Chin-Hsiung Hsu; Huang-Yu Chen; Yao-Wen Chang)
Abstract	Global routing for modern large-scale circuit designs has attracted much attention in the recent literature. Most of the state-of-the-art academic global routers just work on a simplified routing congestion model that ignores the essential via capacity for routing through multiple metal layers. Such a simplified model would easily cause fatal routability problems in subsequent detailed routing. To remedy this deficiency, we present in this paper a more effective congestion metric that considers both the in-tile nets and the residual via capacity for global routing. With this congestion metric, we develop a new global router that features two novel routing algorithms for congestion optimization, namely least-flexibility-first routing and multi-source multi-sink escaping-point routing. The least-flexibility-first routing processes the nets with the least flexibility first, facilitating a quick prediction of congestion hot spots for the subsequent nets. Enjoying lower time complexity than traditional maze and A*-search routing, in particular, the linear-time escaping-point routing guarantees to find the optimal solution and achieves the theoretical lower-bound time complexity. Experimental results show that our global router can achieve very high-quality routing solutions with more reasonable via usage, which can benefit and correctly guide subsequent detailed routing.
Starting Page	350
Ending Page	355
File Size	513455
Page Count	6
File Format	PDF
ISBN	9781424428199
ISSN	10923152
DOI	10.1109/ICCAD.2008.4681597
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Routing Wire Tiles Circuit synthesis Manufacturing Design engineering Degradation Large-scale systems Transistors Design for manufacture
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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