NDLI: Response shaper: a novel technique to enhance unknown tolerance for output response compaction

Content Provider	IEEE Xplore Digital Library
Author	Chao, M.C.-T. Seongmoon Wang Chakradhar, S.T. Kwang-Ting Cheng
Copyright Year	2005
Description	Author affiliation: Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, Santa Barbara, CA, USA (Chao, M.C.-T.)
Abstract	The presence of unknown values in the simulation result is a key barrier to effective output response compaction in practice. This paper proposes a simple circuit module, called a response shaper, to reshape the scan-out responses before feeding them to a space compactor. Along with the proposed reshaping algorithm, response shapers can help the space compactor to reduce the number of undetectable modeled and unmodeled faults in the presence of unknown values. Moreover, the proposed compaction scheme is ATPG-independent and its hardware requirement is pattern-independent. In our experiments, we use a simple XOR compactor as the space compactor to evaluate the effectiveness of the response shaper. The results show that the number of undetectable faults and unobservable scan-out responses can be significantly reduced in comparison with the results of a convolutional compactor. The number of the extra scan-in bits required for the control signals of the response shapers is only a small fraction of the total test data volume. Also, its hardware overhead is acceptable and the runtime of the reshaping algorithm is scalable for large industrial designs.
Starting Page	80
Ending Page	87
File Size	275321
Page Count	8
File Format	PDF
ISBN	078039254X
DOI	10.1109/ICCAD.2005.1560044
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Compaction Circuit faults Hardware Design for testability Automatic testing Chaos National electric code Circuit simulation Convolution Shape control
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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