NDLI: Defining statistical sensitivity for timing optimization of logic circuits with large-scale process and environmental variations

Content Provider	IEEE Xplore Digital Library
Author	Xin Li Jiayong Le Mustafa Celik Pileggi, L.T.
Copyright Year	2005
Description	Author affiliation: Extreme DA, Palo Alto, CA, USA (Xin Li; Jiayong Le; Mustafa Celik)
Abstract	The large-scale process and environmental variations for today's nanoscale ICs are requiring statistical approaches for timing analysis and optimization. Significant research has been recently focused on developing new statistical timing analysis algorithms, but often without consideration for how one should interpret the statistical timing results for optimization. In this paper (Li et al., 2005) we demonstrate why the traditional concepts of slack and critical path become ineffective under large-scale variations, and we propose a novel sensitivity-based metric to assess the "criticality" of each path and/or arc in the statistical timing graph. We define the statistical sensitivities for both paths and arcs, and theoretically prove that our path sensitivity is equivalent to the probability that a path is critical, and our arc sensitivity is equivalent to the probability that an arc sits on the critical path. An efficient algorithm with incremental analysis capability is described for fast sensitivity computation that has a linear runtime complexity in circuit size. The efficacy of the proposed sensitivity analysis is demonstrated on both standard benchmark circuits and large industry examples.
Starting Page	844
Ending Page	851
File Size	369427
Page Count	8
File Format	PDF
ISBN	078039254X
DOI	10.1109/ICCAD.2005.1560180
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Timing Logic circuits Large-scale systems Algorithm design and analysis Delay Probability Circuit analysis computing Fluctuations Random variables Runtime
Content Type	Text
Resource Type	Article

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Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations

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