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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Shih Ping Lin Chung Len Lee Chen, J.E. |
| Copyright Year | 2005 |
| Description | Author affiliation: Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsin Chu, Taiwan (Shih Ping Lin; Chung Len Lee; Chen, J.E.) |
| Abstract | Scan design, providing a good test solution to sequential circuits, suffers large data volume, long test time and high test power problem. Recently, the random access scan (RAS) scheme offers a solution to alleviate the above problems (Baik et al., 2004). In this paper, based on RAS, a cocktail scan scheme is proposed and demonstrated to improve the test efficiency significantly. The scheme adopts a two-phase approach, firstly by using a cycle random scan test with a few random seed patterns to test the DUT and secondly, by using the RAS mechanism to test the circuit. Due to employment of a revised process and several strategies, namely, test response abundant, constrained static compaction, and bit propagation before test vector dropping, it is very effective in reducing bit flipping and test data volume, consequently, the test application time and power. Experimental results show that the scheme can achieve 86% reduction in test data volume and 10 times of speedup in test application time. |
| Starting Page | 94 |
| Ending Page | 99 |
| File Size | 257515 |
| Page Count | 6 |
| File Format | |
| ISBN | 078039254X |
| DOI | 10.1109/ICCAD.2005.1560046 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-11-06 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuit testing Electronic equipment testing Sequential analysis Built-in self-test Data engineering Design engineering Power engineering and energy Sequential circuits Employment Compaction |
| Content Type | Text |
| Resource Type | Article |
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