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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jaewon Seo Taewhan Kim Dutt, N.D. |
| Copyright Year | 2005 |
| Description | Author affiliation: KAIST, Daejeon, South Korea (Jaewon Seo) |
| Abstract | It is generally accepted that the dynamic voltage scaling (DVS) is one of the most effective techniques for energy minimization. According to the granularity of units to which voltage scaling is applied, the DVS problem can be divided into two subproblems: (i) inter-task DVS problem; and (ii) intra-task DVS problem. A lot of effective DVS techniques have addressed either one of the two subproblems, but none of them have attempted to solve both simultaneously, which is mainly due to an excessive computation complexity to solve it optimally. This work addresses this core issue, that is, Can the combined problem be solved effectively and efficiently? More specifically, our work shows, for a set of inter-dependent tasks, that the combined DVS problem can be solved optimally in polynomial time. Experimental results indicate that the proposed integrated DVS technique is able to reduce energy consumption by 10.6% on average over the results by (Zhang et al., 2002 and Seo et al., 2004) (i.e., a straightforward combination of two optimal inter- and intra task DVS techniques). |
| Starting Page | 450 |
| Ending Page | 455 |
| File Size | 260855 |
| Page Count | 6 |
| File Format | |
| ISBN | 078039254X |
| DOI | 10.1109/ICCAD.2005.1560110 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-11-06 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Dynamic voltage scaling Voltage control Energy consumption Minimization Circuits Clocks Frequency Timing Polynomials Real time systems |
| Content Type | Text |
| Resource Type | Article |
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