NDLI: Digital RF processor (DRP/spl trade/) for cellular phones

Content Provider	IEEE Xplore Digital Library
Author	Staszewski, R.B. Muhammad, K. Leipold, D.
Copyright Year	2005
Description	Author affiliation: Wireless Analog Technol. Center, Texas Instruments Inc., Dallas, TX, USA (Staszewski, R.B.; Muhammad, K.; Leipold, D.)
Abstract	RF circuits for multi-GHz frequencies have recently migrated to low-cost digital deep-submicron CMOS processes. Unfortunately, this process environment, which is optimized only for digital logic and SRAM memory, is extremely unfriendly for conventional analog and HF designs. We present fundamental techniques recently developed that transform the RF and analog circuit design complexity to digital domain for a wireless RF transceiver, so that it enjoys the benefits of digital approach, such as process node scaling and design automation. All-digital phase locked loop, all-digital control of phase and amplitude of a polar transmitter, and direct HF sampling techniques allow great flexibility in reconfigurable radio design. Digital signal processing concepts are used to help relieve analog design complexity, allowing one to reduce cost and power consumption in a reconfigurable design environment. Software layers are defined to enable these architectures to develop an efficient software defined radio. VHDL hardware description language is universally used throughout this SoC. The ideas presented have been used in Texas Instruments to develop two generations of commercial digital RF processors: a single-chip Bluetooth radio and a single-chip GSM radio.
Starting Page	122
Ending Page	129
File Size	781156
Page Count	8
File Format	PDF
ISBN	078039254X
DOI	10.1109/ICCAD.2005.1560051
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radio frequency Cellular phones Hafnium Software radio Signal design CMOS process Design optimization CMOS logic circuits Logic design Random access memory
Content Type	Text
Resource Type	Article

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