NDLI: Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions

Content Provider	IEEE Xplore Digital Library
Author	Acar, E. Ozev, S.
Copyright Year	2005
Description	Author affiliation: Duke Univ., Durham, NC, USA (Acar, E.; Ozev, S.)
Abstract	The test cost of RF systems is an increasing percentage of the overall system cost. This trend is mainly due to the traditional RF testing schemes based on the full measurement of specifications over a wide range of input conditions. In this paper, we present a test development methodology for RF circuits based on a novel parametric fault definition. We target deviations in physical circuit parameters, such as a resistance or the width of a transistor. However, we consider a circuit faulty only if it violates a specification. Our test development method aims at reducing not only the number of measurements, but also the overall test hardware cost by incorporating the relative set-up cost of each measurement into our selection criteria. Experimental results on a low-noise amplifier (LNA) circuit show that our test development technique reduces the overall test time (49%-67%) as well as the number of required measurement set-ups (17%-33%) considerably. By defining the target faults based on specification violations, our technique also provides high confidence in the test quality.
Starting Page	73
Ending Page	79
File Size	299844
Page Count	7
File Format	PDF
ISBN	078039254X
DOI	10.1109/ICCAD.2005.1560043
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit testing Radio frequency Fault location Circuit faults Costs Electrical resistance measurement System testing Hardware Low-noise amplifiers Time measurement
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Parametric Test Development for RF Circuits Targeting Physical Fault Locations and Using Specification-Based Fault Definitions (2005)

Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions

A Built-In-Test Circuit for RF Differential Low Noise Amplifiers

An Embedded Test Circuit for RF Single Ended Low Noise Amplifiers

Defect-based RF testing using a new catastrophic fault model

A new built-in self-test (BIST) for a RF low-noise amplifier (LNA)

A new BIST scheme for 5GHz low noise amplifiers

Sensitivity Analysis for Fault-analysis and Tolerance in RF Front-end Circuitry

Optimising test sets for a low noise amplifier with a defect-oriented approach

Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions

Similar Documents

Parametric Test Development for RF Circuits Targeting Physical Fault Locations and Using Specification-Based Fault Definitions (2005)

Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions

A Built-In-Test Circuit for RF Differential Low Noise Amplifiers

An Embedded Test Circuit for RF Single Ended Low Noise Amplifiers

Defect-based RF testing using a new catastrophic fault model

A new built-in self-test (BIST) for a RF low-noise amplifier (LNA)

A new BIST scheme for 5GHz low noise amplifiers

Sensitivity Analysis for Fault-analysis and Tolerance in RF Front-end Circuitry

Optimising test sets for a low noise amplifier with a defect-oriented approach

Parametric test development for RF circuits targeting physical fault locations and using specification-based fault definitions