NDLI: Design of a dual-modality, digital positron emission tomography/computed tomography (PET/CT) scanner for small animal imaging

Content Provider	IEEE Xplore Digital Library
Author	Fontaine, R. Michaud, J.-B. Belanger, F. Cadorette, J. Leroux, J.-D. Pratte, J.-F. Robert, S. Lecomte, R.
Copyright Year	2003
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Eng., Sherbrooke Univ., Que., Canada (Fontaine, R.; Michaud, J.-B.; Belanger, F.)
Abstract	Contemporary PET scanners are commonly implemented with VLSI analog front-end electronics to reduce power consumption, space, noise and cost. Analog processing yields excellent results in dedicated applications, but offers little flexibility for sophisticated signal processing. One design goal of the new Sherbrooke PET/CT scanner is to achieve 1 mm resolution in both emission (PET) and transmission (CT) imaging using the same detection system. One further goal is to be able to use PET detectors and electronics to count and discriminate individual X-ray photons in CT mode. These requirements can be better met by sampling and digitizing the analog signal from each individual channel as early as possible. To meet these requirements, we developed an open digital architecture allowing new technology developments to be incorporated. A specific charge-sensitive amplifier (CSP) satisfying PET and CT needs, a low noise data acquisition system and advanced digital signal processing methods are joined together in order to meet requirements. The hardware is based on standard off-the-shelf 8- bit 100-MHz high-speed analog converters (ADC) and high-performance field programmable gate arrays (FPGA). By implementing 64 channels per board, a 1024-channel PET/CT camera can be created by disposing 16 such modular boards on a ring.
Sponsorship	Whitaker Found
Starting Page	998
Ending Page	1001
File Size	470717
Page Count	4
File Format	PDF
ISBN	0780377893
ISSN	1094687X
DOI	10.1109/IEMBS.2003.1279936
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-09-17
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Positron emission tomography Computed tomography Animals Field programmable gate arrays Very large scale integration Energy consumption Noise reduction Costs Signal processing Process design
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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