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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Jhih-Rong Gao Pei-Ci Wu Ting-Chi Wang |
| Copyright Year | 2008 |
| Description | Author affiliation: Synopsys Inc., Taipei (Jhih-Rong Gao; Pei-Ci Wu) |
| Abstract | In this paper, we present a new global router, NTHU-Route, for modern designs. NTHU-Route is based on iterative rip-ups and reroutes, and several techniques are proposed to enhance our global router. These techniques include (1) a history based cost function which helps to distribute overflow during iterative rip-ups and reroutes, (2) an adaptive multi-source multi-sink maze routing method to improve the wirelength of maze routing, (3) a congested region identification method to specify the order for nets to be ripped up and rerouted, and (4) a refinement process to further reduce overflow when iterative history based rip-ups and reroutes reach bottleneck. Compared with two state-of-the-art works on ISPD98 benchmarks, NTHU-Route outperforms them in both overflow and wirelength. For the much larger designs from the ISPD07 benchmark suite, our solution quality is better than or comparable to the best results reported in the ISPD07 routing contest. |
| Starting Page | 232 |
| Ending Page | 237 |
| File Size | 142525 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424419210 |
| DOI | 10.1109/ASPDAC.2008.4483948 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-03-21 |
| Publisher Place | South Korea |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Routing History Iterative methods Delay Cost function Approximation methods Computer science Wire Transistors Very large scale integration |
| Content Type | Text |
| Resource Type | Article |
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