NDLI: Decomposition based approach for synthesis of multi-level threshold logic circuits

Content Provider	IEEE Xplore Digital Library
Author	Gowda, T. Vrudhula, S.
Copyright Year	2008
Description	Author affiliation: Arizona State Univ., Tempe (Gowda, T.; Vrudhula, S.)
Abstract	Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the functioning of MOSFETs no longer hold in nano dimensions. Recent research into nano devices has shown that nano devices can be an alternative to CMOS when scaling of CMOS becomes infeasible in the near future. This is motivating the need for stable and mature design automation techniques for threshold logic since it is the design abstraction used for most nano- devices. This paper presents a new decomposition theory that is based on the properties of threshold functions. The main contributions of this paper are: (1) A new method of algebraic factorization called the min-max factorization. (2) A decomposition theory that uses this new factorization to identify and characterize threshold functions. (3) A new threshold logic synthesis methodology that uses the decomposition theory. This synthesis methodology produces circuits that are better than the previous state of art (27% better gate count and comparable circuit depth).
Starting Page	125
Ending Page	130
File Size	828269
Page Count	6
File Format	PDF
ISBN	9781424419210
DOI	10.1109/ASPDAC.2008.4483925
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-03-21
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit synthesis Logic circuits Measurement MOSFETs Design automation CMOS logic circuits Logic devices Logic design Nanoscale devices Logic functions
Content Type	Text
Resource Type	Article

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