NDLI: Diagnosis of dense-time systems using digital-clocks

Content Provider	IEEE Xplore Digital Library
Author	Shengbing Jiang Kumar, R.
Copyright Year	2006
Description	Author affiliation: GM R&D & Planning, Warren, MI (Shengbing Jiang)
Abstract	We study failure diagnosis of timed discrete-event systems modeled as dense timed-automata for which reachability is decidable (Alur, 1999; Henzinger et al., 1994). Failure diagnosis of such systems was first studied in "formal techniques in real time and fault tolerant systems" by Tripakis (2002), assuming that a diagnoser has partial observation of events but can measure (or "observe") time perfectly. In this paper we relax the latter requirement since in practice time cannot be measured precisely. Thus in our setting we have partial observability of events as well as of "time". We model the observability of time based on a digital-clock of finite precision that measures time discretely by generating ticks, the logic of which is governed by a timed-automaton. As an example a finite-precision finite-drift digital clock that ticks every [Delta plusmn delta] (Delta > delta ges 0) units of time can be modeled as a timed-automaton. We show that the "discrete-time behavior" observed using such a clock is regular, i.e., can be represented using a finite (untimed) automaton. In our analysis we allow the non-failure behavior to be also represented as a separate dense timed-automaton that is deterministic (also decidable), which can be viewed as another extension. We show that the verification of diagnosability (ability to detect specification violation within a bounded delay) as well as the offline synthesis of a diagnoser for a diagnosable system is decidable by reducing the problem to the untimed domain. The reduction to the untimed domain also suggests an effective method for an online diagnosis
Sponsorship	American Automatic Control Council IFAC
File Size	280182
File Format	PDF
ISBN	1424402093
e-ISBN	1424402107
DOI	10.1109/ACC.2006.1657691
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-06-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	American Automatic Control Council(AACC)
Subject Keyword	Time measurement Observability Clocks Discrete event systems Fault diagnosis Real time systems Fault tolerant systems Logic Automata Delay
Content Type	Text
Resource Type	Article

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2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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