NDLI: FPGA implementation of learning rate supervisory loop for neural network based adaptive control of a flexible joint

Content Provider	IEEE Xplore Digital Library
Author	Chaoui, H. Sicard, P. Fatine, S.
Copyright Year	2006
Description	Author affiliation: Inf. Technol. & Eng. Sch., Ottawa, Ont. (Chaoui, H.)
Abstract	In this paper, we propose a VLSI implementation of a control strategy based on artificial neural networks (ANN) for a positioning system with a flexible transmission element, taking into account Coulomb friction for both motor and load, and using a variable learning rate for adaptation to parameter changes and to accelerate convergence. The control structure includes an ANN that approximates the inverse of the model and a reference model that defines the desired error dynamic. Adaptation of the learning rate of the ANN is used to reduce the sensitivity of the control structure to load and motor inertia variations. The paper presents a VLSI implementation of a supervisor that adapts the neural network learning rate on a Virtex2 Pro 2VP30 field programmable gate array (FPGA) from Xilinx. A pipelined implementation was used to speed-up the process. Simulation results highlight the performance of the controller and its response
Sponsorship	American Automatic Control Council IFAC
File Size	360654
File Format	PDF
ISBN	1424402093
e-ISBN	1424402107
DOI	10.1109/ACC.2006.1657289
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-06-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	American Automatic Control Council(AACC)
Subject Keyword	Field programmable gate arrays Neural networks Adaptive control Artificial neural networks Very large scale integration Control systems Friction Acceleration Convergence Inverse problems
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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