NDLI: Ultra low power NEMFET based logic

Content Provider	IEEE Xplore Digital Library
Author	Enachescu, M. Lefter, M. Bazigos, A. Ionescu, A.M. Cotofana, S.D.
Copyright Year	2013
Description	Author affiliation: Nanoelectronic Devices Lab., Ecole Polytech. Fed. de Lausanne (EPFL), Lausanne, Switzerland (Bazigos, A.; Ionescu, A.M.) \|\| Comput. Eng. Lab., Delft Univ. of Technol., Delft, Netherlands (Enachescu, M.; Lefter, M.; Cotofana, S.D.)
Abstract	In this paper, we introduce a Nano-Electro-Mechanical Field Effect Transistor (NEMFET) based logic family tailored to the implementation of low speed and ultra low energy functional units and processors. Basic Boolean gates implemented with NEMFETs only are analysed and compared against equivalent CMOS realisations. Our simulations suggest that the proposed short-circuit current free NEMFET gates exhibit up to 10x dynamic energy reduction and up to 2 orders of magnitude less leakage, at the expense of 10 to 20x slower operation, when compared with CMOS counterparts. We also analyse the fan-in influence on gate performance and observe that NEMFET the gate energy advantage increases with fan-in. Finally, we consider a 3D-Stacked hybrid NEMFET-CMOS computation platform running a heartbeat rate monitor application and demonstrate that NEMFET based logic is an enabling factor for the implementation of “zero-energy” operated systems.
Starting Page	566
Ending Page	569
File Size	617874
Page Count	4
File Format	PDF
ISBN	9781467357609
ISSN	02714302
e-ISBN	9781467357623
DOI	10.1109/ISCAS.2013.6571905
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-05-19
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates CMOS integrated circuits Semiconductor device modeling Integrated circuit modeling Inverters Delays Transistors
Content Type	Text
Resource Type	Article

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