NDLI: 256-channel integrated neural interface and spatio-temporal signal processor

Content Provider	IEEE Xplore Digital Library
Author	Aziz, J.N.Y. Genov, R. Bardakjian, B.R. Derchansky, M. Carlen, P.L.
Copyright Year	2006
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Toronto Univ., Ont. (Aziz, J.N.Y.; Genov, R.)
Abstract	We present an architecture and VLSI implementation of a distributed neural interface and spatio-temporal signal processor. The integrated neural interface records neural activity simultaneously on 256 voltage-mode channels. Each channel implements differential signal acquisition, amplification and band-pass filtering. An array of in-channel double-memory sample-and-hold cells stores two 16 times 16 electronic images of distributed neural activity consecutively in time. A column-parallel double sampling circuit performs frame differencing in order to identify spatio-temporal neural activity patterns. A 3 mm times 4.5 mm integrated prototype was fabricated in a 0.35 mum CMOS technology. The functionality of the neural interface was experimentally demonstrated in extracellular in vitro recordings from the hippocampus of mice. The utility of the on-sensory-plane signal processor was validated in simulated wavefront detection performed on experimentally measured distributed neural activity recording
Sponsorship	The Inst. of Electr. and Electron. Eng., Inc. Circuits and Syst. Soc. (IEEE CASS)
Starting Page	4
Ending Page	5078
File Size	2306479
Page Count	5075
File Format	PDF
ISBN	0780393899
DOI	10.1109/ISCAS.2006.1693773
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-21
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Signal processing CMOS technology Very large scale integration Voltage Band pass filters Filtering Image sampling Signal sampling Circuits Prototypes
Content Type	Text
Resource Type	Article

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