NDLI: Architecture refinements by code refactoring of behavioral VHDL-AMS models

Content Provider	IEEE Xplore Digital Library
Author	Kaiping Zeng Huss, S.A.
Copyright Year	2006
Description	Author affiliation: Dept. of Comput. Sci., Darmstadt Univ. of Technol. (Kaiping Zeng; Huss, S.A.)
Abstract	This paper presents an automatic structure synthesis technique by partitioning the system representation, which consists of interconnected analog and mixed-signal behavioral models coded in VHDL-AMS. The proposed model code refining methodology restructures, refines, and simplifies behavioral models by means of code transformations of given abstract models. The fundamental approach for these transforms is code refactoring - an approach taken from software engineering and adjusted to the requirements of analog circuit synthesis. Through code refactoring one improves the comprehensibility, expandability, and reusability of a behavioral block model and restructures the model such that subsequent circuit synthesis steps may produce adequate structural representations of the intended behavior. Application examples demonstrate the feasibility of this approach to architecture synthesis
Sponsorship	The Inst. of Electr. and Electron. Eng., Inc. Circuits and Syst. Soc. (IEEE CASS)
Starting Page	4
Ending Page	1478
File Size	3169191
Page Count	1475
File Format	PDF
ISBN	0780393899
DOI	10.1109/ISCAS.2006.1692875
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-21
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Context modeling Circuit synthesis Software engineering Electronic design automation and methodology Mathematical model Integrated circuit modeling Catalogs Radio frequency High level synthesis Computer architecture
Content Type	Text
Resource Type	Article

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