NDLI: A tunable floating gate CMOS resistor for low-power and low-voltage applications

Content Provider	IEEE Xplore Digital Library
Author	Ozalevli, E. Hasler, P.E.
Copyright Year	2006
Description	Author affiliation: Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA (Ozalevli, E.; Hasler, P.E.)
Abstract	This paper describes an implementation of a tunable CMOS resistor that can be fully integrated in a standard CMOS technology with low-power and low-voltage applications. It is built by exploiting the capacitive coupling and voltage storage capabilities of a floating-gate transistor. Also, a scaled-gate linearization technique is utilized to suppress the transistor nonlinearities in the triode region. The resistance of the proposed circuit is tuned by utilizing Fowler-Nordheim tunnelling and hot-electron injection quantum mechanical phenomena. We present experimental data from the chip that was fabricated in 0.5mum CMOS process, and show that this resistor exhibits total harmonic distortion (THD) better than 7-bit linearity for 1KHz $1V_{pp}$ sinusoidal input
Sponsorship	The Inst. of Electr. and Electron. Eng., Inc. Circuits and Syst. Soc. (IEEE CASS)
Starting Page	4
Ending Page	4276
File Size	4778304
Page Count	4273
File Format	PDF
ISBN	0780393899
DOI	10.1109/ISCAS.2006.1693573
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-21
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Resistors Tunable circuits and devices CMOS technology Integrated circuit technology Coupling circuits Voltage Linearization techniques Tuned circuits Tunneling Secondary generated hot electron injection
Content Type	Text
Resource Type	Article

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