NDLI: A new multi-valued static random access memory (MVSRAM) with hybrid circuit consisting of single-electron (SE) and MOSFET

Content Provider	IEEE Xplore Digital Library
Author	Yu, Y.S. Kye, H.W. Song, B.N. Kim, S.-J. Choi, J.-B.
Copyright Year	2006
Description	Author affiliation: Dept. of Inf. & Control Eng., Hankyong Nat. Univ., Anseong (Yu, Y.S.)
Abstract	A new multi-valued static random access memory (MVSRAM) cell with a hybrid circuit consisting of single-electron (SE) and MOSFETs is proposed. The previously reported MVSRAM with SE-MOSFET hybrid circuit needs two data lines, one bit line (BL) for write operations and one sense line (SL) for read operations, to improve the speed of the read-out operation, but the proposed cell has only one data line for read/write operations, resulting in a memory area that is much smaller than that of the previous cell, without any reduction of read-out speed
Sponsorship	The Inst. of Electr. and Electron. Eng., Inc. Circuits and Syst. Soc. (IEEE CASS)
Starting Page	4
Ending Page	4578
File Size	1173878
Page Count	4575
File Format	PDF
ISBN	0780393899
DOI	10.1109/ISCAS.2006.1693648
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-05-21
Publisher Place	Greece
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	SRAM chips MOSFET circuits Read-write memory Low voltage Random access memory Tin Capacitance Physics Single electron transistors Multivalued logic
Content Type	Text
Resource Type	Article

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A new multi-valued static random access memory (MVSRAM) with hybrid circuit consisting of single-electron (SE) and MOSFET