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Content Provider | IEEE Xplore Digital Library |
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Author | Ma Jianguo Sun Yubo Xing Ling Ma Qiang |
Copyright Year | 2010 |
Description | Author affiliation: School of Information Engineering, Southwest University of Science and Technology, Mianyang 621010, China (Ma Jianguo; Sun Yubo; Xing Ling; Ma Qiang) |
Abstract | UCL (Uniform Content Locator) which can be used in information management and semantic comprehension has attracted more and more attentions from researchers. In this paper, a hardware system of UCL filtering based on FPGA is proposed. In addition a new type of CAM (Content Addressable Memory) and a hardware platform are designed. In experimental environment, the BIP (Broadcasting Internet Protocol) packets formed by indexing UCL in source side are delivered to user terminals, and the filtering system realizes UCL resolving with FPGA in Ethernet. The results show that the system filtering rate is up to 10Mbit/S and maximum frequency reaches 238MHz. |
Starting Page | 4193 |
Ending Page | 4196 |
File Size | 157294 |
Page Count | 4 |
File Format | |
ISBN | 9781424462636 |
e-ISBN | 9787894631046 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2010-07-29 |
Publisher Place | China |
Access Restriction | Subscribed |
Rights Holder | Chinese Association of Aut |
Subject Keyword | Filtering Computer aided manufacturing FPGA Random access memory Hardware Filtering Hardware Software Field programmable gate arrays CAM Clocks UCL |
Content Type | Text |
Resource Type | Article |
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