NDLI: A quantitative evaluation of IEC61850 process bus architectures

Content Provider	IEEE Xplore Digital Library
Author	Tournier, J.-C. Werner, T.
Copyright Year	2010
Description	Author affiliation: ABB Inc., Corporate Research, 940 Main Campus Dr., Suite 300 Raleigh, NC 27612, USA (Tournier, J.-C.; Werner, T.)
Abstract	The IEC 61850 standard plays an important role in the smart grid landscape by providing an unified way of accessing and exchanging data related to substations equipment. While large parts of the standard are widely adopted and integrated by the different vendors, the 9–2 part, or process bus, remains a challenge because of the number of opposite constraints that have to be addressed at the same time, such as scalability, reliability, real-time and cost efficiency. This paper does not provide the way to implement the process bus, but rather gives means to evaluate and compare different process bus solutions. In this study, we are performing a quantitative evaluation of different process bus architectures along the reliability, availability, performance and cost criteria. The performance criteria encompasses the evaluation with respect to the real time constraints as well as the overall load of the communication infrastructure. The cost criteria identifies the initial investment cost for a given solution and also evaluates the maintenance cost over the life time of the process bus. The main contributions of this paper are (a) to give a full evaluation by integrating all relevant criteria; (b) explicitly explain how the different evaluations are performed; (c) to integrate all elements for the reliability calculation, especially the optical fibres which are usually omitted but considered as the least reliable elements; (d) to evaluate the latest redundancy protocols for automation networks such as PRP and HSR; and (e) to evaluate architectures that take full advantage of IEC 61850 by deploying protection and control functions in innovative ways.
Starting Page	1
Ending Page	8
File Size	475053
Page Count	8
File Format	PDF
ISBN	9781424465491
ISSN	19449925
e-ISBN	9781424465514
e-ISBN	9781424483570
DOI	10.1109/PES.2010.5588205
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-07-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bismuth Current transformers Optical switches Availability Merging Protocols
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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