NDLI: A 0.8V 1.52MHz MSVC Relaxation Oscillator with Inverted Mirror Feedback Reference for UHF RFID

Content Provider	IEEE Xplore Digital Library
Author	Barnett, R. Jin Liu
Copyright Year	2006
Description	Author affiliation: Texas Instrum., Inc., Dallas, TX (Barnett, R.)
Abstract	A 0.8V nano-power relaxation oscillator for EPC standard UHF RFID transponder is presented. A low-voltage inverted mirror feedback $V_{GS}/R$ reference is proposed to provide correlated current and voltage references for the oscillator. As a result, the oscillator frequency is solely determined by the resistor in the reference and the timing capacitor to meet the frequency tolerance specification. Meanwhile, to minimize the power consumption, a minimum-supply-voltage-constraint (MSVC) design criterion is proposed to minimize the required supply voltage. The inverted mirror feedback technique reduces the headroom requirement of the traditional VGS /R to meet the MSVC. Measurement results show that the entire oscillator requires a minimum supply voltage of 0.8V in the prototype chip fabricated in CMOS 0.13mum technologies. The measured oscillation frequency is 1.52MHz with 400nA total current consumption. The chip area is $13400mum^{2}$
Starting Page	769
Ending Page	772
File Size	352585
Page Count	4
File Format	PDF
ISBN	1424400759
DOI	10.1109/CICC.2006.320975
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Mirrors Feedback Radiofrequency identification Frequency Voltage-controlled oscillators Semiconductor device measurement CMOS technology Transponders Resistors Timing
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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