NDLI: A Soft-Error Tolerant Content-Addressable Memory (CAM) Using An Error-Correcting-Match Scheme

Content Provider	IEEE Xplore Digital Library
Author	Pagiamtzis, K. Azizi, N. Najm, F.N.
Copyright Year	2006
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Toronto Univ., Ont. (Pagiamtzis, K.; Azizi, N.; Najm, F.N.)
Abstract	Modern integrated circuits require careful attention to the soft-error rate (SER) resulting from bit upsets, which are normally caused by alpha particle or neutron hits. These events, also referred to as single-event upsets (SEUs), will become more problematic in future technologies. This paper presents a binary content-addressable memory (CAM) design with high immunity to SEUs. Conventionally, error-correcting codes (ECC) have been used in SRAMs to address this issue, but these techniques are not immediately applicable to CAMs because they depend on processing the full contents of the memory word outside the array, which is not possible in a normal CAM access. The proposed design consists of a new matching technique that uses coding to increase the Hamming distance between words, in conjunction with a modified matchline sensing scheme. The result is a CAM design that reduces the SER with no increase in delay or power dissipation, and with only a 12% increase in area
Starting Page	301
Ending Page	304
File Size	5216684
Page Count	4
File Format	PDF
ISBN	1424400759
DOI	10.1109/CICC.2006.320887
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-09-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computer aided manufacturing CADCAM Single event transient Error correction codes Alpha particles Neutrons Integrated circuit technology Hamming distance Delay Power dissipation
Content Type	Text

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