NDLI: An integrated design flow for a via-configurable gate array

Content Provider	IEEE Xplore Digital Library
Author	Yajun Ran Marek-Sadowska, M.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA (Yajun Ran; Marek-Sadowska, M.)
Abstract	In This work we present a complete physical design flow for a via-configurable gate array (VCGA). The VCGA is an array of prefabricated logic blocks and fixed metal masks. The block consists of via-configurable functional cells and a via-decomposable flip-flop. An M1-M2 via mask is used to define the block's functionality. Interconnects are customized using via masks. We developed a physical design flow for VCGA, which integrates a set of effective techniques. Here, we highlight the packing, cell-binding, and detailed-routing problems. We use our design flow to compare the VCGA-based and standard-cell/FPGA-based designs. Experimental results show the efficiency of our flow.
Starting Page	582
Ending Page	589
File Size	645880
Page Count	8
File Format	PDF
ISBN	0780387023
ISSN	10923152
DOI	10.1109/ICCAD.2004.1382644
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-11-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Costs Field programmable gate arrays Fabrics Logic arrays Switches Wires Productivity Manufacturing Routing Radio access networks
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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