NDLI: Interconnect lifetime prediction under dynamic stress for reliability-aware design

Content Provider	IEEE Xplore Digital Library
Author	Zhijian Lu Wei Huang Lach, J. Stan, M. Skadron, K.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Virginia Univ., Charlottesville, VA, USA (Zhijian Lu; Wei Huang; Lach, J.; Stan, M.)
Abstract	Thermal effects are becoming a limiting factor in high-performance circuit design due to the strong temperature-dependence of leakage power, circuit performance, IC package cost and reliability. While many interconnect reliability models assume a constant temperature, this paper presents a physics-based model for estimating interconnect lifetime for any time-varying temperature/current profile. This model is verified with numerical solutions. With this model, we show that designers may be more aggressive with the temperature profiles that are allowed on a chip. In fact, our model reveals that when the temperature magnitude variation is small, average temperature (instead of worst-case temperature) can be used to accurately predict interconnect lifetime, allowing for significant design margin reclamation in reliability-aware design. Even when the variation of temperature magnitude is large, our model shows that using the maximum temperature is still too conservative for interconnect lifetime prediction. Therefore, our model not only increases the accuracy of reliability estimates, but also enables designers to consider more aggressive designs. This model is similarly useful for temperature-aware dynamic runtime management.
Starting Page	327
Ending Page	334
File Size	611928
Page Count	8
File Format	PDF
ISBN	0780387023
ISSN	10923152
DOI	10.1109/ICCAD.2004.1382595
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-11-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Temperature Integrated circuit interconnections Predictive models Thermal stresses Thermal factors Circuit synthesis Circuit optimization Integrated circuit packaging Costs Life estimation
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Software

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