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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ramanathan, L.N. Keser, B. Amrine, C. Trung Duong Hayes, S. Leal, G. Mangrum, M. Mitchell, D. Wenzel, R. |
| Copyright Year | 2008 |
| Description | Author affiliation: Freescale Semicond. Inc., Tempe, AZ (Ramanathan, L.N.; Keser, B.; Amrine, C.; Trung Duong; Hayes, S.; Leal, G.; Mangrum, M.; Mitchell, D.; Wenzel, R.) |
| Abstract | The redistributed chip packaging is an embedded chip technology that eliminates the need for wirebonds and flip chip bumps. This technology enables smaller packages at a lower cost, while providing improved mechanical, electrical and thermal performance. The process involves producing panels placing the chip active face down along with an embedded ground plane (EGP) and screen printing encapsulant to embed the die. Subsequently alternate layers of dielectric and Cu metallization are built up and the packages are sawn into individual units. The use of wafer fabrication tools enables finer lines and spaces in the build-up layers. This paper will discuss process conditions during the panelization and the integration of the base function of an i.275 GSM/EDGE mobile phone into a single module measuring a maximum of 1 square inch. The design of the EGP and the role of simulations to achieve a robust, reliable package will also be discussed. The outputs included moisture sensitivity level (MSL) 3 testing, air-to-air thermal cycling (- 40C/125C) and unbiased highly accelerated stress testing (HAST). Testing of RCP packages will also be discussed. |
| Starting Page | 1117 |
| Ending Page | 1120 |
| File Size | 820083 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781424422302 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.2008.4550115 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2008-05-27 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Mobile handsets Packaging Testing Thermal stresses Flip chip Costs Printing Dielectrics Metallization Fabrication |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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