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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hsieh, G. Mcallister, A. |
| Copyright Year | 2005 |
| Description | Author affiliation: Intel Corp., Hillsboro, OR, USA (Hsieh, G.; Mcallister, A.) |
| Abstract | With increasing attention on component damage caused by motherboard flexure during manufacturing processes, strain-based methodologies are being incorporated into component testing and manufacturing tool qualifications. While significant progress has been made in proliferation of these methodologies, some fundamental questions have not been sufficiently addressed. One of these is the nature in which bend mode impacts the relationship between board strain and forces or stresses acting on the solder ball. To understand this, a study into the effect of bend mode was performed. From a flexure experiment and a series of finite element models, it is shown that the point at which interconnects fail is associated with the mode in which the board is deformed. As a metric to measure board strain, maximum principal strain is very sensitive to bend mode. The diagonal strain metric can reduce, but cannot completely eliminate, bend mode sensitivity. Both the design of experiment (DOE) and the finite element models show that a planar bend mode in which the board has significant curvature in only one direction (e.g. four-point bend) is more benign than a mode in which the board has significant curvature in two orthogonal directions (e.g. twist and a spherical mode). In addition, it was found that a strain gauge placed on the substrate corner can be a very useful experimental tool in flip-chip ball grid array (FCBGA) component testing for the purpose of identifying the onset of cracking under lands on the PCB side. These key points have been successfully incorporated into the flexure testing methodology for FCBGA components at Intel. |
| Starting Page | 937 |
| Ending Page | 944 |
| File Size | 1668389 |
| Page Count | 8 |
| File Format | |
| ISBN | 0780389077 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.2005.1441385 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-05-31 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Flip chip Electronics packaging Testing Capacitive sensors Strain measurement Manufacturing processes Finite element methods Qualifications Stress Deformable models |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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