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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Pendse, Raj Choi, Y.N. Kim, K.M. Narvaez, G. Jafari, B. Singh, I. |
| Copyright Year | 2005 |
| Description | Author affiliation: STATSChipPAC Inc., Fremont, CA, USA (Raj Pendse; Choi, Y.N.; Kim, K.M.; Narvaez, G.) |
| Abstract | A no-flow underfill (NFU) process has been developed using a 11.5 /spl times/ 11.5 mm graphics device in a 35 /spl times/ 35 mm BGA package. Commonly known problems in NFU processing such as, "die floating" and "filler trapping" were resolved using a novel chip attach process involving controlled application of heat and pressure during chip placement. In addition, NFU materials with filler contents and distributions comparable to conventional capillary underfills were employed to ensure good long-term reliability of solder joints for large die sizes. Reliability testing showed two notable problem areas that had to be addressed by optimization of NFU material and assembly processes: (a) the formulation and content of flux in NFU had to be tailored to prevent onset of hydrolysis in the residual resin upon HAST or PCT exposure, which is typical in anhydride based resin formulations: (b) filler content in the 50 % range and good fillet coverage in the die corner regions was critical in achieving high temperature cycling reliability. The final optimized NFU formulation and process passed full qualifications for graphics devices. In this paper, the assembly process development, reliability testing and package optimization are covered in detail. Special emphasis is given to the understanding and resolution of reliability and failure modes unique to the NFU process. Benefits and challenges of future applications of NFU to hi Pb and Pb-free solder bumps is discussed. |
| Starting Page | 291 |
| Ending Page | 296 |
| File Size | 467309 |
| Page Count | 6 |
| File Format | |
| ISBN | 0780389077 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.2005.1441281 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-05-31 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Flip chip Materials reliability Graphics Packaging Assembly Resins Pressure control Temperature control Process control Joining materials |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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