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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Alajoki, M. Luu Nguyen Jorma Kivilahti |
| Copyright Year | 2005 |
| Description | Author affiliation: Lab. of Electron. Production Technol., Helsinki Univ. of Technol., Espoo, Finland (Alajoki, M.) |
| Abstract | The reliability of the two different types of WL-CSP components being reflow-soldered with a near eutectic Sn3.8Ag0.7Cu and eutectic SnPb solder pastes on Ni(P)/Au-and OSP-coated multilayer printed wiring boards have been investigated by employing the standard drop test, statistical failure analyses, fractography and microstructural characterization methods. A significant difference in the reliability performance of the components was observed: the components with the (Al)Ni(V)/Cu metallization (UBM) were more reliable than those with the electroless Ni(P)/Au metallization ndependently of the bump, solder paste, surface finish materials or the pad structure of the boards used. The failure analyses revealed that the primary failure mode in the component side is the cracking of interconnections along a brittle NiSnP layer between the electroless Ni(P) of high P-content and the solder alloy, while components with (Al)Ni(V)/Cu UBM fail by cracking along the [Cu,Ni]6Sn5 intermetallic layer. On the board side the cracking occurs in the porous NiSnP layer formed between the electroless Ni(P) metallization and the (Cu,Ni)/sub 6/Sn/sub 5/ intermetallic layer. The fact that the cracking occurs predominantly at the components side reaction layer is due to three factors: higher normal stresses in the component side, brittleness of the reaction layer(s) and the strain-rate hardening of the bulk solder interconnections. It is to be noted that the primary failure mode differs from that typically observed in thermally cycled test assemblies, where the nucleation and propagation of cracks are strongly enhanced by the recrystallization of the solder interconnections. |
| Starting Page | 637 |
| Ending Page | 644 |
| File Size | 2845550 |
| Page Count | 8 |
| File Format | |
| ISBN | 0780389077 |
| ISSN | 05695503 |
| DOI | 10.1109/ECTC.2005.1441336 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-05-31 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Testing Chip scale packaging Wafer scale integration Metallization Failure analysis Materials reliability Intermetallic Nonhomogeneous media Wiring Gold |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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