NDLI: FCOB reliability evaluation simulating multiple rework/reflow processes

Content Provider	IEEE Xplore Digital Library
Author	Chen, W. Gentile, J. Higgins, L.
Copyright Year	1996
Description	Author affiliation: Adv. Packaging Technol., Motorola Inc., Austin, TX, USA (Chen, W.)
Abstract	Flip chip assembly (Direct Chip Attach (DCA), or Flip Chip on Board (FCOB)) on Printed Wiring Boards, in conjunction with conventional leaded device surface mount technology, is beginning to proliferate in compact and portable systems. DCA with conventional C4 bumps requires solder coated bond pads to allow joining in typical SMT reflow cycles. A flip chip device on a typical FCOB/SMT board will usually experience no high temperature excursions after the die joining and underfill encapsulant cure unless the board undergoes a rework cycle. FCOB single chip packages and multichip modules are now in development with standard C4 bumps, and a new Motorola 'E-3' bump which requires no solder on bond pads. These solder interconnects must be stable through multiple heat treatments expected in subsequent system level assembly and repair operations. Flip Chip Plastic Ball Grid Arrays (FC-PBGAs) will typically undergo three solder reflow, or reheat, cycles to /spl sim/220/spl deg/C subsequent to initial flip chip reflow assembly. The multiple reheats are for BGA ball attach, board level BGA SMT assembly, second side BGA SMT assembly, and possible rework operations. In this paper, the effect of multiple reheats on the solder connection microstructure and strength (before, and after, underfill encapsulation), and the integrity of the underfill encapsulant adhesive and cohesive strength is reported, using both FCOB single chip packages and multiple chip modules. The effect of multiple reheats on electrical resistance of daisy chain nets, and die stress (radius of curvature), is also reported. Hot air gun rework (before underfill) is simulated and standard belt furnace reflows are utilized. Cross-sections of bump connections and underfill interfaces were studied to assess changes induced by the temperature exposures. The reliability of the FCOB assemblies was assessed via temperature cycle, thermal shock and autoclave tests.
Starting Page	1184
Ending Page	1195
File Size	1810583
Page Count	12
File Format	PDF
ISBN	0780332865
ISSN	05695503
DOI	10.1109/ECTC.1996.550886
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-05-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip chip Surface-mount technology Temperature Assembly systems Bonding Packaging Wiring Lead Multichip modules Standards development
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

FCOB reliability evaluation simulating multiple rework/reflow processes

Development and evaluation of lead free reflow soldering techniques for the flip chip bonding of large GaAs pixel detectors on Si readout chip

Evaluation of the oven reflow bonding and flip chip bonder bonding of lead free Sn0.7Cu solder bumped die on low-cost FR-4 substrate for flip-chip applications

Flip chip on board: assessment of reliability in cellular phone application

Sensitivity analysis of Pb free reflow profile parameters toward flip chip on silicon assembly yield, reliability and intermetallic compound characteristics

Flip chip assembly process development, reliability assessment and process characterization for polymer stud grid array-chip scale package

Chip bumping for rework on FCOB assembly line

Fine-pitch, cost effective flip chip package development: TAB-BGA

Development of fluxless flip chip bonding to a thin film multichip module substrate

FCOB reliability evaluation simulating multiple rework/reflow processes

Similar Documents

FCOB reliability evaluation simulating multiple rework/reflow processes

Development and evaluation of lead free reflow soldering techniques for the flip chip bonding of large GaAs pixel detectors on Si readout chip

Evaluation of the oven reflow bonding and flip chip bonder bonding of lead free Sn0.7Cu solder bumped die on low-cost FR-4 substrate for flip-chip applications

Flip chip on board: assessment of reliability in cellular phone application

Sensitivity analysis of Pb free reflow profile parameters toward flip chip on silicon assembly yield, reliability and intermetallic compound characteristics

Flip chip assembly process development, reliability assessment and process characterization for polymer stud grid array-chip scale package

Chip bumping for rework on FCOB assembly line

Fine-pitch, cost effective flip chip package development: TAB-BGA

Development of fluxless flip chip bonding to a thin film multichip module substrate

FCOB reliability evaluation simulating multiple rework/reflow processes