NDLI: Development of molded fine-pitch ball grid array (FPBGA) using through-hole bonding process

Content Provider	IEEE Xplore Digital Library
Author	Matsuda, S. Kata, K. Nakajima, H. Hagimoto, E.
Copyright Year	1996
Description	Author affiliation: VLSI Package Dev. Dept., NEC Corp., Kanagawa, Japan (Matsuda, S.)
Abstract	A molded fine-pitch ball grid array (FPBGA) structure, consisting of the fabricated chip, carrier tape, molded resin, and solder bumps, has many advantages over conventional structures for chip-scale packages. The assembly process of FPBGA consists of through-hole bonding, lamination, molding, solder bump formation, and outline cutting. The bonding process, which is called through-hole bonding, does not have lead bending or wire or lead crossing and allows a finer chip pad pitch to be used. However, since it is difficult to evaluate the bonding strength of each part, unlike wire bonding or TAB inner lead bonding, we developed several methods for evaluating the through-hole bonding. In the fabrication of molded FPBGA, the back side of the chip is molded by resin, which improves the robustness of the package. In this process, it is important to keep coplanarity of the package surface. We are currently testing the reliability of the molded FPBGA and results are good.
Starting Page	727
Ending Page	732
File Size	975175
Page Count	6
File Format	PDF
ISBN	0780332865
ISSN	05695503
DOI	10.1109/ECTC.1996.517465
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-05-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electronics packaging Lead Resins Wire Chip scale packaging Assembly Lamination Bonding processes Fabrication Robustness
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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