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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Hei Kam Lee, D.T. Howe, R.T. Tsu-Jae King |
| Copyright Year | 2005 |
| Description | Author affiliation: Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA (Hei Kam; Lee, D.T.) |
| Abstract | An accumulation-mode design for nanometer-scale electromechanical-gate field effect transistors (NEMFETs) is proposed and studied via simulation. In the off state, the gate electrode is in contact with the thin gate dielectric and short-channel effects are effectively suppressed. In the on state, the gate electrode is separated from the thin gate dielectric so that the threshold voltage $V_{T}$ is dynamically lowered and the transistor drive current I $_{on}$ is enhanced, and gate leakage is eliminated. The NEMFET can likely meet performance specifications for low-power applications at 25 nm gate length, and is attractive for scaled supply voltage operation |
| Starting Page | 463 |
| Ending Page | 466 |
| File Size | 354970 |
| Page Count | 4 |
| File Format | |
| ISBN | 078039268X |
| DOI | 10.1109/IEDM.2005.1609380 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-12-05 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | FETs Low power electronics Dielectrics Electrodes MOSFETs Threshold voltage CMOS technology Tunneling Breakdown voltage Springs |
| Content Type | Text |
| Resource Type | Article |
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