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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Kochte, M.A. Schaal, M. Wunderlich, H.-J. Zoellin, C.G. |
| Copyright Year | 2010 |
| Description | Author affiliation: Institut fuer Technische Informatik, Universitaet Stuttgart Pfaffenwaldring 47, 70569 Stuttgart, Germany (Kochte, M.A.; Schaal, M.; Wunderlich, H.-J.; Zoellin, C.G.) |
| Abstract | Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structures are particularly computationally expensive as a large number of patterns has to be evaluated. In this work, we propose to map a fault simulation algorithm based on the parallel-pattern single-fault propagation (PPSFP) paradigm to many-core architectures and describe the involved algorithmic optimizations. Many-core architectures are characterized by a high number of simple execution units with small local memory. The proposed fault simulation algorithm exploits the parallelism of these architectures by use of parallel data structures. The algorithm is implemented for the NVIDIA GT200 Graphics Processing Unit (GPU) architecture and achieves a speed-up of up to 17x compared to an existing GPU fault-simulation algorithm and up to 16x compared to state-of-the-art algorithms on conventional processor architectures. |
| Starting Page | 380 |
| Ending Page | 385 |
| File Size | 353394 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424466771 |
| ISSN | 0738100X |
| e-ISBN | 9781450300025 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-06-13 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Circuit faults Computational modeling Circuit simulation Circuit testing Integrated circuit testing Integrated circuit reliability Computer architecture Circuit analysis Pattern analysis Analytical models PPSFP Parallel Fault Simulation Many-Core Processors |
| Content Type | Text |
| Resource Type | Article |
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