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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Chenjie Yu Petrov, P. |
| Copyright Year | 2010 |
| Description | Author affiliation: University of Maryland, College Park, USA (Chenjie Yu; Petrov, P.) |
| Abstract | We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multi-core systems. A major challenge with multi-core system design is the widening gap between the memory demand generated by the processor cores and the limited off-chip memory bandwidth and memory service speed. This severely restricts the number of cores that can be integrated into a multi-core system and the parallelism that can be actually achieved and efficiently exploited for not only memory demanding applications, but also for workloads consisting of many tasks utilizing a large number of cores and thus exceeding the available off-chip bandwidth. Last level shared cache partitioning has been shown to be a promising technique to enhance cache utilization and reduce missrates. While most cache partitioning techniques focus on cache miss rates, our work takes a different approach in which tasks' memory bandwidth requirements are taken into account when identifying a cache partitioning for multi-programmed and/or multithreaded workloads. Cache resources are allocated with the objective that the overall system bandwidth requirement is minimized for the target workload. The key insight is that cache miss-rate information may severely misrepresent the actual bandwidth demand of the task, which ultimately determines the overall system performance and power consumption. |
| Starting Page | 132 |
| Ending Page | 137 |
| File Size | 523369 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424466771 |
| ISSN | 0738100X |
| e-ISBN | 9781450300025 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-06-13 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Bandwidth Minimization methods Educational institutions System performance Hardware Partitioning algorithms Throughput Multicore processing Resource management Energy consumption Off-Chip bandwidth reduction L2 Cache Partitioning |
| Content Type | Text |
| Resource Type | Article |
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