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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Skadron, K. Stan, M.R. Wei Huang Sankaranarayanan, K. Zhijian Lu Lach, J. |
| Copyright Year | 2004 |
| Description | Author affiliation: Dept. of Comput. Sci., Virginia Univ., Charlottesville, VA, USA (Skadron, K.) |
| Abstract | Cooling costs for notebook, desktop, and server computer systems are rising exponentially as power densities for high-performance chips continue to double every three years. Research has led to a range of advances in modeling and design of thermal packaging and circuit boards. Yet a major front that has been absent is thermal design in the computer architecture domain, where processor utilization, the interleaving of different computation processes, and the flow of instructions through the CPU are controlled. The architecture domain presents a rich opportunity for thermal management that complements other advances by controlling temperature at runtime in response to the dynamic behavior of the computer's current workload. This paper describes a compact modeling algorithm that is appropriate for this domain, presents some architecture techniques for runtime thermal management, and describes some interesting problems that remain to be solved. |
| Sponsorship | IEEE-CPMT |
| Starting Page | 415 |
| Ending Page | 422 |
| File Size | 957094 |
| Page Count | 8 |
| File Format | |
| ISBN | 0780384202 |
| DOI | 10.1109/ESIME.2004.1304072 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2004-05-10 |
| Publisher Place | Belgium |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Thermal management Computer architecture Runtime Power system management Cooling Costs Power system modeling Packaging Printed circuits Interleaved codes |
| Content Type | Text |
| Resource Type | Article |
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