NDLI: Greedy approach based heuristics for partitioning SpMxV on FPGAs

Content Provider	IEEE Xplore Digital Library
Author	Jiasen Huang Weina Lu Junyan Ren
Copyright Year	2015
Description	Author affiliation: State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China (Jiasen Huang; Junyan Ren) \|\| Inst. of Comput. Technol., Beijing, China (Weina Lu)
Abstract	To eliminate the overhead of zero padding in sparse matrix-vector multiplication (SpMxV), prior works have been focusing on partitioning a sparse matrix into row vectors sets (RVS's) or sub-matrices. Nevertheless, performance degraded still due to the sparsity pattern of a sparse matrix. In this paper, we propose a heuristics, called recursive merging, which uses greedy approach to recursively merge those row vectors of nonzeros in a matrix into the RVS's, such that each set included is ensured a local optimal solution. For ten uneven benchmark matrices from the University of Florida Sparse Matrix Collection, our proposed partitioning algorithm is always identified as the method with the highest mean density (over 96%). An average speedup of 249X is thus achieved for all these ten matrices when 32 processors are allocated for implementation SpMxV on XC7V485T FPGAs.
Starting Page	1
Ending Page	2
File Size	281155
Page Count	2
File Format	PDF
ISBN	9780993428005
DOI	10.1109/FPL.2015.7293988
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-09-02
Publisher Place	UK
Access Restriction	Subscribed
Rights Holder	Imperial College
Subject Keyword	Sparse matrices highest mean density SpMxV partitioning recursive merging greedy approach
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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