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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Gunther, W. Drechsler, R. |
| Copyright Year | 2001 |
| Description | Author affiliation: Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany (Gunther, W.) |
| Abstract | Ordered Binary Decision Diagrams (OBDDs) are the state-of-the-art data structure in VLSI CAD for representation and manipulation of Boolean functions. But due to the ordering restriction, many Boolean functions cannot be represented efficiently. As one alternative read-k-times BDDs have been proposed. They are a generalization of OBDDs in the way that variables may occur up to k times on each path, while they may only occur once in OBDDs. More functions can be represented by read-k-times BDDs in polynomial space than by OBDDs, while many operations, like synthesis and satisfiability, still have polynomial worst case behavior. In this paper, we present a new technique for implementation of read-k-times BDD packages on top of standard OBDD implementations. Thus, highly optimized OBDD packages can be used and only few changes in the code are needed, while the new type of decision diagram allows much smaller representations. Experimental results are given to demonstrate the efficiency of the approach. |
| Sponsorship | Broadcom India |
| Starting Page | 173 |
| Ending Page | 178 |
| File Size | 589399 |
| Page Count | 6 |
| File Format | |
| ISBN | 0769508316 |
| ISSN | 10639667 |
| DOI | 10.1109/ICVD.2001.902657 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2001-01-07 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Data structures Boolean functions Binary decision diagrams Packaging Polynomials Very large scale integration Computer science Logic design Formal verification |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture |
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