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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Torrens, G. Alorda, B. Bota, S. Segura, J. |
| Copyright Year | 2009 |
| Description | Author affiliation: Balearic Islands University, Ctra. de Valldemossa km 7.5, 07122 Palma de Mallorca (Spain) (Torrens, G.; Alorda, B.; Bota, S.; Segura, J.) |
| Abstract | We analyze two complementary radiation-hardening techniques for 6T SRAM memories compatible with structured layouts. One approach relies on the individual selection of the threshold voltage of each of the four transistors forming the cross-coupled inverters of the SRAM cell. The other one is based on the modification of the widths of all pmos or all nmos transistors of the cell. The first technique does not affect the cell layout. The second one increases the minimum width of all pmos by a factor c and the minimum width of all nmos by a factor c. This prevents the formation of diffusion bends, allowing structured layouts. Both techniques provide an improvement in SEU robustness. |
| Starting Page | 791 |
| Ending Page | 795 |
| File Size | 467948 |
| Page Count | 5 |
| File Format | |
| ISBN | 9781424428885 |
| ISSN | 15417026 |
| DOI | 10.1109/IRPS.2009.5173351 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-04-26 |
| Publisher Place | Canada |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Random access memory Single event upset Inverters Threshold voltage MOSFETs MOS devices Robustness Alpha particles Impurities Neutrons |
| Content Type | Text |
| Resource Type | Article |
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