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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Bravaix, A. Guerin, C. Huard, V. Roy, D. Roux, J.M. Vincent, E. |
| Copyright Year | 2009 |
| Description | Author affiliation: STMicroelectronics, Crolles 2 alliance, 850 rue Jean Monnet, 38926, France (Huard, V.; Roy, D.; Roux, J.M.; Vincent, E.) || ISEN-IM2NP, UMR CNRS 6242, Maison des Technologies, place G. Pompidou 83000 Toulon, France (Bravaix, A.; Guerin, C.) |
| Abstract | Channel Hot-Carrier degradation presents a renewed interest in the last NMOS nodes where the device reliability of bulk silicon (core) 40nm and Input/Output (IO) device is difficult to achieve at high temperature as a function of supply voltage VDD and back bias V. A three mode interface trap generation is proposed based on the energy acquisition involved in distinct interactions in all the V, V (V) conditions as a single I lifetime dependence is observed with V > 0. This gives a new age(t) function useful for accurate DC to AC transfers. Positive temperature activation is explained by the rise of ionization rate with electron-electron scattering (medium I) and multi vibrational excitation (higher I) which increase the H desorption by thermal emission. The use of forward VBS has shown no gain under CHC for both device types. The main limitation occurs under reverse V = −V in IO where the smaller temperature activation partially compensates the larger damage. In that case a security margin can be established giving a limit of V = −V/2 for design reliability. |
| Starting Page | 531 |
| Ending Page | 548 |
| File Size | 892646 |
| Page Count | 18 |
| File Format | |
| ISBN | 9781424428885 |
| ISSN | 15417026 |
| DOI | 10.1109/IRPS.2009.5173308 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-04-26 |
| Publisher Place | Canada |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Hot carriers Acceleration Energy management MOS devices Temperature Degradation Silicon Voltage Ionization Scattering High Temperature component Channel Cold Carriers Hot-Carriers Multi Vibrational Excitation Interface traps Back Bias effects |
| Content Type | Text |
| Resource Type | Article |
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