NDLI: An integrated air-gap-capacitor process for sensor applications

Content Provider	IEEE Xplore Digital Library
Author	King, J.T. Hae-Seung Lee
Copyright Year	1991
Description	Author affiliation: Microsyst. Technol. Lab., MIT, Cambridge, MA, USA (King, J.T.; Hae-Seung Lee)
Abstract	Several MOS-compatible techniques and processes for fabricating diaphragms for use in capacitive sensors have been developed and incorporated with a unique capacitance detection scheme. Surface and bulk micromachining are used to produce a flexible, conductive diaphragm after MOS device structures for circuits are built. The wafer surface forms the bottom plate of a variable air-gap capacitor, and the diaphragm constitutes the top plate that deforms under pressure. KOH etching of small holes through the silicon substrate and subsequent HF etching of a sacrificial dielectric layer through these holes form the diaphragm after circuit processing. Special one-sided etching techniques are used to protect the frontside from etchant attack. A test chip containing doped-polysilicon diaphragm air-gap capacitors and NMOS readout circuits has been successfully fabricated and tested, demonstrating the compatibility of the diaphragm sensor structure with MOS circuitry. The thicknesses of the poly diaphragms range from 0.5 to 1 mu m, and they are 100 mu m*100 mu m in size.
Starting Page	1010
Ending Page	1013
File Size	382567
Page Count	4
File Format	PDF
ISBN	0879425857
DOI	10.1109/SENSOR.1991.149065
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1991-06-24
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Etching Circuit testing Capacitive sensors MOS devices Air gaps MOS capacitors Dielectric substrates Capacitance Micromachining Flexible printed circuits
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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