NDLI: SR-RRT: Selective retraction-based RRT planner

Content Provider	IEEE Xplore Digital Library
Author	Junghwan Lee OSung Kwon Liangjun Zhang Sung-eui Yoon
Copyright Year	2012
Description	Author affiliation: Dept. of CS, Stanford University, USA (Liangjun Zhang) \|\| Dept. of CS, KAIST, Daejeon, South Korea (Junghwan Lee; OSung Kwon) \|\| Dept. of CS, KAIST, Korea (Sung-eui Yoon)
Abstract	We present a novel retraction-based planner, selective retraction-based RRT, for efficiently handling a wide variety of environments that have different characteristics. We first present a bridge line-test that can identify regions around narrow passages, and then perform an optimization-based retraction operation selectively only at those regions. We also propose a non-colliding line-test, a dual operator to the bridge line-test, as a culling method to avoid generating samples near wide-open free spaces and thus to generate more samples around narrow passages. These two tests are performed with a small computational overhead and are integrated with a retraction-based RRT. In order to demonstrate benefits of our method, we have tested our method with different benchmarks that have varying amounts of narrow passages. Our method achieves up to 21 times and 3.5 times performance improvements over a basic RRT and an optimization-based retraction RRT, respectively. Furthermore, our method consistently improves the performances of other tested methods across all the tested benchmarks that have or do not have narrow passages.
Starting Page	2543
Ending Page	2550
File Size	1486332
Page Count	8
File Format	PDF
ISBN	9781467314039
ISSN	10504729
e-ISBN	9781467314053
e-ISBN	9781467314046
DOI	10.1109/ICRA.2012.6224928
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-05-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bridges Benchmark testing Principal component analysis Planning Probabilistic logic Robots Algorithm design and analysis
Content Type	Text
Resource Type	Article
Subject	Artificial Intelligence Control and Systems Engineering Electrical and Electronic Engineering Software

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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