NDLI: Flip chip interfacial behavior under thermal testing

Content Provider	IEEE Xplore Digital Library
Author	Zhong, Z.W. Shi, X.Q. Wong, K.W. Wang, Z.P.
Copyright Year	2002
Description	Author affiliation: Sch. of Mech. & Production Eng., Nanyang Technol. Univ., Singapore (Zhong, Z.W.)
Abstract	In this study, the interfacial behavior of a flip chip structure under thermal testing was investigated using high sensitivity moire interferometry. The real-time moire interferometry was used to monitor and measure the deformation of the specimen during the test. Two kinds of specimen were prepared: (1) specimen without a crack and (2) specimen with horizontal crack at the silicon-epoxy interface. The results show that the maximum shear strain occurs at the silicon-epoxy interface. The shear strain variation increases significantly along the interface, with the maximum shear concentration occurring at the edge of the specimen. The creep effect is more dominant in the FR4-epoxy interface. In order to characterize the behavior of the interfacial crack, stress intensity factors K/sub I/ and K/sub II/, and the strain energy release rate in the vicinity of the crack tip were used to conduct a qualitative study. It was observed that a sharp strain gradient occurred at the crack tip. The stress intensity factors K/sub I/ and K/sub II/ were dependent on temperature. The strain energy release rate with respect to temperature was dominated by K/sub I/ for the interfacial crack in the specimen.
Starting Page	56
Ending Page	59
File Size	425483
Page Count	4
File Format	PDF
ISBN	0780374355
DOI	10.1109/EPTC.2002.1185597
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-12-10
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Flip chip Testing Capacitive sensors Gratings Interferometry Temperature Silicon Thermal loading Assembly Stress
Content Type	Text
Resource Type	Article

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