NDLI: Interfacial behavior of a flip-chip structure under thermal testing

Content Provider	IEEE Xplore Digital Library
Author	Zhong, Z.W. Wong, K.W. Shi, X.Q.
Copyright Year	1999
Abstract	In this paper, the interfacial behavior of a flip-chip structure under thermal testing was investigated using high sensitivity, real-time Moire interferometry. The model package studied was a sandwich structure consisting of a silicon chip, epoxy underfill and FR4 substrate. The behavior of FR4-underfill and silicon-underfill interfaces of the specimen under certain thermal loading was examined. The results show that the shear strain variation increases significantly along the interfaces, with the maximum shear strain concentration occurring at the edge of the specimen. At the edge, the maximum shear strain occurs at the silicon-underfill interface, and the FR4-underfill interface experiences a slightly lower shear strain. The creep effect is more dominant in the FR4-underfill interface when the specimen is heated for 2 h at 100/spl deg/C. Upon cooling to 20/spl deg/C, both the interfaces of the specimen experience partial strain recovery.
Sponsorship	IEEE Components, Packaging, and Manufacturing Technology Society International Microelectronics Assembly and Packaging Society (IMAPS)
Starting Page	43
Ending Page	48
Page Count	6
File Size	272463
File Format	PDF
ISSN	1521334X
Volume Number	27
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-01-01
Publisher Place	U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Testing Electronic packaging thermal management Capacitive sensors Optical interferometry Thermal stresses Microelectronics Silicon Integrated circuit technology Strain measurement Atomic force microscopy
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Electrical and Electronic Engineering

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