NDLI: Solder paste printing and stencil design considerations for wafer bumping

Content Provider	IEEE Xplore Digital Library
Author	Lathrop, R.
Copyright Year	2004
Description	Author affiliation: Circuit Mater. Div., Heraeus Ind., Philadelphia, PA, USA (Lathrop, R.)
Abstract	Recently wafer bumping using solder paste with very fine solder powder has become into focus as more cost effective than conventional sputtered or plated methods. This additive method resolves around a stencil printing process similar to conventional SMT with the exception of extremely small pitch and desired deposit size. An optimal print process for a high aperture density design has been established. Print process variables such as squeegee type, print gap, and separation speed are tested and quantified as to their effect of deposit variability. This study was done on 200mm wafers and involved over 6 million bump deposits. Results of a second study on the effects of stencil aperture size and shape combined with several stencil thickness on bump height and diameter variability are presented. This second study was done with both water soluble and no clean formulation and involved a total of 135 variables and over 68,000 measured bumps. A more recent study designed to push paste performance and stencil design to their limits in order to determine the maximum bump height possible in full array designs down to 150 micron pitch is discussed with preliminary results presented. The combination of the findings of all three studies results in a print process and stencil design recipe for producing consistent wafer bumps of various sizes.
Sponsorship	IEEE CPMT SEMI
Starting Page	229
Ending Page	237
File Size	1750148
Page Count	9
File Format	PDF
ISBN	0780385829
ISSN	10898190
DOI	10.1109/IEMT.2004.1321667
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-07-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Printing Apertures Surface-mount technology Nickel Powders Surface finishing Circuits Costs Additives Testing
Content Type	Text
Resource Type	Article
Subject	Industrial and Manufacturing Engineering Electrical and Electronic Engineering

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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