NDLI: Equivalence among stochastic logic circuits and its application

Content Provider	IEEE Xplore Digital Library
Author	Te-Hsuan Chen Hayes, J.P.
Copyright Year	2015
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., Univ. of Michigan, Ann Arbor, MI, USA (Te-Hsuan Chen; Hayes, J.P.)
Abstract	Stochastic computing (SC) uses standard logic to process pseudo-random bit-streams denoting probabilities. It implements arithmetic operations by extremely simple and low-power hardware. Despite major new applications, SC's theory and design requirements are poorly understood. We observe that the Boolean functions used in SC take the form f(X) = $f(X_{V};X_{C}),$ where $X_{V}$ and $X_{C}$ are inputs with variable and constant probabilities, respectively. Different functions can be equivalent in the sense of implying the same stochastic behavior. We define stochastic equivalence classes (SECs), and investigate their properties and applications. Suitably interpreted, SECs describe all realizable arithmetic functions of interest. While conventional synthesis focuses on finding the best circuit to implement a known function, stochastic circuit optimization first requires finding the best function. We present an SEC-based approach to this problem, which demonstrates the computational richness of SC and leads to significant cost reductions compared to prior designs.
Starting Page	1
Ending Page	6
File Size	1403381
Page Count	6
File Format	PDF
ISBN	9781479980529
DOI	10.1145/2744769.2744837
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Optimization Logic functions Tin Logic gates Circuit synthesis Adders Equivalence classes Approximate computing Logic synthesis and optimization Stochastic circuit design Stochastic computing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Equivalence among stochastic logic circuits and its application

Introduction to stochastic computing and its challenges

Timing-driven optimization using lookahead logic circuits

Synchronous logic synthesis: circuit specifications and optimization algorithms

STRAUSS: Spectral Transform Use in Stochastic Circuit Synthesis

Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic

Rule-based optimization of reversible circuits

Rule-based optimization of reversible circuits

Toggle Equivalence Preserving (TEP) Logic Optimization

Equivalence among stochastic logic circuits and its application

Similar Documents

Equivalence among stochastic logic circuits and its application

Introduction to stochastic computing and its challenges

Timing-driven optimization using lookahead logic circuits

Synchronous logic synthesis: circuit specifications and optimization algorithms

STRAUSS: Spectral Transform Use in Stochastic Circuit Synthesis

Circuit Line Minimization in the HDL-Based Synthesis of Reversible Logic

Rule-based optimization of reversible circuits

Rule-based optimization of reversible circuits

Toggle Equivalence Preserving (TEP) Logic Optimization

Equivalence among stochastic logic circuits and its application