NDLI: Joint precision optimization and high level synthesis for approximate computing

Content Provider	IEEE Xplore Digital Library
Author	Chaofan Li Wei Luo Sapatnekar, S.S. Jiang Hu
Copyright Year	2015
Description	Author affiliation: Dept. of ECE, Univ. of Minnesota, Minneapolis, MN, USA (Sapatnekar, S.S.) \|\| Dept. of ECE, Texas A&M Univ., College Station, TX, USA (Chaofan Li; Wei Luo; Jiang Hu)
Abstract	Approximate computing has been recognized as an effective low power technique for applications with intrinsic error tolerance, such as image processing and machine learning. Existing efforts on this front are mostly focused on approximate circuit design, approximate logic synthesis or processor architecture approximation techniques. This work aims at how to make good use of approximate circuits at system and block level. In particular, approximation aware scheduling, functional unit allocation and binding algorithms are developed for data intensive applications. Simple yet credible error models, which are essential for precision control in the optimizations, are investigated. The algorithms are further extended to include bitwidth optimization in fixed point computations. Experimental results, including those from Verilog simulations, indicate that the proposed techniques facilitate desired energy savings under latency and accuracy constraints.
Starting Page	1
Ending Page	6
File Size	805724
Page Count	6
File Format	PDF
ISBN	9781479980529
DOI	10.1145/2744769.2744863
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-08
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Association for Computing Machinery, Inc. (ACM)
Subject Keyword	Approximation methods Optimization Computational modeling Adders Resource management Approximation algorithms Mathematical model approximate computing High level synthesis
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Joint precision optimization and high level synthesis for approximate computing

SALSA: Systematic logic synthesis of approximate circuits

Approximate IPA: Trading unbiasedness for simplicity

Sequential optimization algorithm based on support vector regression

IMPACT: IMPrecise adders for low-power approximate computing

Stochastic discrete resource allocation optimization

A geometrical approach for power optimization in relay-based cellular networks

Designing energy-efficient approximate adders using parallel genetic algorithms

Optimization of average precision with Maximal Figure-of-Merit Learning

Joint precision optimization and high level synthesis for approximate computing

Similar Documents

Joint precision optimization and high level synthesis for approximate computing

SALSA: Systematic logic synthesis of approximate circuits

Approximate IPA: Trading unbiasedness for simplicity

Sequential optimization algorithm based on support vector regression

IMPACT: IMPrecise adders for low-power approximate computing

Stochastic discrete resource allocation optimization

A geometrical approach for power optimization in relay-based cellular networks

Designing energy-efficient approximate adders using parallel genetic algorithms

Optimization of average precision with Maximal Figure-of-Merit Learning

Joint precision optimization and high level synthesis for approximate computing