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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Cavigelli, L. Magno, M. Benini, L. |
| Copyright Year | 2015 |
| Description | Author affiliation: Integrated Syst. Lab., ETH Zurich, Zurich, Switzerland (Cavigelli, L.; Magno, M.; Benini, L.) |
| Abstract | Today there is a clear trend towards deploying advanced computer vision (CV) systems in a growing number of application scenarios with strong real-time and power constraints. Brain-inspired algorithms capable of achieving record-breaking results combined with embedded vision systems are the best candidate for the future of CV and video systems due to their flexibility and high accuracy in the area of image understanding. In this paper, we present an optimized convolutional network implementation suitable for real-time scene labeling on embedded platforms. We show that our algorithm can achieve up to 96GOp/s, running on the Nvidia Tegra K1 embedded SoC. We present experimental results, compare them to the state-of-the-art, and demonstrate that for scene labeling our approach achieves a 1.5x improvement in throughput when compared to a modern desktop CPU at a power budget of only 11 W. |
| Starting Page | 1 |
| Ending Page | 6 |
| File Size | 1113297 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781479980529 |
| DOI | 10.1145/2744769.2744788 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-06-08 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Association for Computing Machinery, Inc. (ACM) |
| Subject Keyword | Throughput Convolution Labeling Feature extraction Graphics processing units Real-time systems Performance evaluation Convolutional Networks Accelerator Scene Labeling |
| Content Type | Text |
| Resource Type | Article |
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