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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Fatemi, H. Nazarian, S. Pedram, M. |
| Copyright Year | 2007 |
| Description | Author affiliation: Dept. of EE-Syst., Southern California Univ., Los Angeles, CA (Fatemi, H.) |
| Abstract | An accurate model is presented to calculate the short circuit energy dissipation of logic cells. The short circuit current is highly dependent on the input and output voltage values. Therefore the actual shape of the voltage signal waveforms at the input and output of the cell should be considered in order to precisely calculate the short circuit energy dissipation. Previous approaches such as the approximation of the crosstalk induced noisy waveforms with saturated ramps can lead to short circuit energy estimation errors as high as an order of magnitude for a minimum sized inverter. To resolve this shortcoming, a current-based logic cell model is utilized, which constructs the output voltage waveform for a given noisy input waveform. The input and output voltage waveforms are then used to calculate the short circuit current, and hence, short circuit energy dissipation. A characterization process is executed for each logic cell in the standard cell library to model the relevant electrical parameters e.g., the parasitic capacitances and nonlinear current sources. Additionally, our model is capable of calculating the short circuit energy dissipation caused by glitches in VLSI circuits, which in some cases can be a key contributor to the total circuit energy dissipation. Experimental results show an average error of about 1% and a maximum error of 3% compared to SPICE for different types of logic cells under noisy input waveforms including glitches while the runtime speedup is up to a factor of 16,000. |
| Starting Page | 774 |
| Ending Page | 779 |
| File Size | 8119363 |
| Page Count | 6 |
| File Format | |
| ISBN | 1424406293 |
| DOI | 10.1109/ASPDAC.2007.358083 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-01-23 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Circuit noise Crosstalk Energy dissipation Voltage Noise shaping Short circuit currents Logic circuits Shape Estimation error Inverters |
| Content Type | Text |
| Resource Type | Article |
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