NDLI: Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation

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Thermal-driven Symmetry Constraint for Analog Layout with CBL Representation

Content Provider	IEEE Xplore Digital Library
Author	Jiayi Liu Sheqin Dong Yuchun Ma Di Long Xianlong Hong
Copyright Year	2007
Description	Author affiliation: DCST, Tsinghua Univ., Beijing (Jiayi Liu; Sheqin Dong; Yuchun Ma; Di Long; Xianlong Hong)
Abstract	In the context of SOI, thermal constraint is more serious for analog devices. Besides the hot-spot effect, the temperature gradient on symmetrical devices may cause errors and even failures in the function. In order to handle these problems, this paper introduces an accurate thermal model into the placement process. Based on the geometric symmetry which is achieved with corner block list (CBL) for the first time, the thermal model helps to find the thermal-optimal placement. And the experimental results show this method is promising.
Starting Page	191
Ending Page	196
File Size	6791674
Page Count	6
File Format	PDF
ISBN	1424406293
DOI	10.1109/ASPDAC.2007.357984
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-01-23
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Temperature Thermal conductivity Electronic design automation and methodology Solid modeling Circuits Threshold voltage Frequency Silicon on insulator technology Isothermal processes Conducting materials
Content Type	Text
Resource Type	Article

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