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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Baine, P. Montgomery, J.H. Armstrong, B.M. Gamble, H.S. Harrington, S.J. Nigrin, S. Wilson, R. Oo, K.B. Armstrong, A.G. Suder, S. |
| Copyright Year | 1963 |
| Abstract | The buried oxide (BOX) layer in silicon on insulator (SOI) was replaced by a compound buried layer (CBL) containing layers of SiO2, polycrystalline silicon (polysilicon), and SiO2. The undoped polysilicon in the CBL acted as a dielectric with a higher thermal conductivity than SiO2. CBL provides a reduced thermal resistance with the same equivalent oxide thickness as a standard SiO2 buried layer. Thermal resistance was further reduced by lateral heat flow through the polysilicon. Reduction in thermal resistance by up to 68% was observed, dependent on polysilicon thickness. CBL SOI substrates were designed and manufactured to achieve a 40% reduction in thermal resistance compared with an 1.0-μm SiO2 BOX. Power bipolar transistors with an active silicon layer thickness of 13.5 μm manufactured on CBL SOI substrates showed a 5%-17% reduction in thermal resistance compared with the standard SOI. This reduction was dependent on transistor layout geometry. Between 65% and 90% of the heat flow from these power transistors is laterally through the thick active silicon layer. Analysis confirmed that CBL SOI provided a 40% reduction in the vertical path thermal resistance. Devices employing thinner active silicon layers will achieve the greater benefit from reduction in vertical path thermal resistance offered by CBL SOI. |
| Sponsorship | IEEE Electron Devices Society |
| Starting Page | 1999 |
| Ending Page | 2006 |
| Page Count | 8 |
| File Size | 1569022 |
| File Format | |
| ISSN | 00189383 |
| Volume Number | 61 |
| Issue Number | 6 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Thermal resistance Substrates Silicon Thermal conductivity Transistors Conductivity SOI technology. Compound buried layer (CBL) silicon on insulator (SOI) power bipolar transistors on SOI reduced thermal resistance in SOI SOI technology |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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